From 012005008b55c310590e745ec6c07e74ff0214e4 Mon Sep 17 00:00:00 2001 From: Chen Tang Date: Thu, 18 Jun 2026 16:01:05 +0200 Subject: [PATCH 1/5] Rework of -target/-mcpu/-mfpu options Due to various issues reported so far: https://github.com/Open-CMSIS-Pack/cmsis-toolbox/issues/583 https://github.com/arm/arm-toolchain/issues/861 the -target/-mcpu/-mfpu options in CLANG.17.0.1.cmake have been reworked based on the ATfE manual pages: https://developer.arm.com/documentation/107976/22-1-0/Compile-for-a-specific-Arm-architecture-or-Arm-processor/-mcpu-command-line-options-for-M-profile-processors?lang=en https://developer.arm.com/documentation/107976/22-1-0/Compile-for-a-specific-Arm-architecture-or-Arm-processor/-mcpu-command-line-options-for-A-profile-processors https://developer.arm.com/documentation/107976/22-1-0/Compile-for-a-specific-Arm-architecture-or-Arm-processor/-mcpu-command-line-options-for-R-profile-processors --- .../cbuildgen/config/CLANG.17.0.1.cmake | 184 ++++++++++++------ 1 file changed, 128 insertions(+), 56 deletions(-) diff --git a/tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake b/tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake index cb2806e0d..042ef3c8c 100644 --- a/tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake +++ b/tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake @@ -91,49 +91,56 @@ if(CPU STREQUAL "Cortex-M0") set(CLANG_ARCH "armv6m") set(CLANG_ARCH_SUFFIX "_soft_nofp") set(CLANG_MCPU "cortex-m0") + set(CLANG_MFPU "") elseif(CPU STREQUAL "Cortex-M0+") set(CLANG_ARCH "armv6m") set(CLANG_ARCH_SUFFIX "_soft_nofp") set(CLANG_MCPU "cortex-m0plus") + set(CLANG_MFPU "") elseif(CPU STREQUAL "Cortex-M1") set(CLANG_ARCH "armv6m") set(CLANG_ARCH_SUFFIX "_soft_nofp") set(CLANG_MCPU "cortex-m1") + set(CLANG_MFPU "") elseif(CPU STREQUAL "Cortex-M3") set(CLANG_ARCH "armv7m") set(CLANG_ARCH_SUFFIX "_soft_nofp") set(CLANG_MCPU "cortex-m3") + set(CLANG_MFPU "") elseif(CPU STREQUAL "Cortex-M4") set(CLANG_ARCH "armv7em") if(FPU STREQUAL "SP_FPU") set(CLANG_ARCH_SUFFIX "_hard_fpv4_sp_d16") set(CLANG_MCPU "cortex-m4") - set(CLANG_MFPU "fpv4-sp-d16") + set(CLANG_MFPU "") set(CLANG_MFLOATABI "hard") else() set(CLANG_ARCH_SUFFIX "_soft_nofp") - set(CLANG_MCPU "cortex-m4") + set(CLANG_MCPU "cortex-m4+nofp") + set(CLANG_MFPU "") endif() elseif(CPU STREQUAL "Cortex-M7") set(CLANG_ARCH "armv7em") if(FPU STREQUAL "DP_FPU") set(CLANG_ARCH_SUFFIX "_hard_fpv5_d16") set(CLANG_MCPU "cortex-m7") - set(CLANG_MFPU "fpv5-d16") + set(CLANG_MFPU "") set(CLANG_MFLOATABI "hard") elseif(FPU STREQUAL "SP_FPU") set(CLANG_ARCH_SUFFIX "_hard_fpv4_sp_d16") - set(CLANG_MCPU "cortex-m7") - set(CLANG_MFPU "fpv5-sp-d16") + set(CLANG_MCPU "cortex-m7+nofp.dp") + set(CLANG_MFPU "") set(CLANG_MFLOATABI "hard") else() set(CLANG_ARCH_SUFFIX "_soft_nofp") - set(CLANG_MCPU "cortex-m7") + set(CLANG_MCPU "cortex-m7+nofp") + set(CLANG_MFPU "") endif() elseif(CPU STREQUAL "Cortex-M23") - set(CLANG_ARCH "armv6m") + set(CLANG_ARCH "armv8m.base") set(CLANG_ARCH_SUFFIX "_soft_nofp") set(CLANG_MCPU "cortex-m23") + set(CLANG_MFPU "") elseif(CPU STREQUAL "Cortex-M33") set(CLANG_ARCH "armv8m.main") if(FPU STREQUAL "SP_FPU") @@ -143,15 +150,16 @@ elseif(CPU STREQUAL "Cortex-M33") else() set(CLANG_MCPU "cortex-m33+nodsp") endif() - set(CLANG_MFPU "fpv5-sp-d16") + set(CLANG_MFPU "") set(CLANG_MFLOATABI "hard") else() set(CLANG_ARCH_SUFFIX "_soft_nofp") if(DSP STREQUAL "DSP") - set(CLANG_MCPU "cortex-m33") + set(CLANG_MCPU "cortex-m33+nofp") else() - set(CLANG_MCPU "cortex-m33+nodsp") + set(CLANG_MCPU "cortex-m33+nodsp+nofp") endif() + set(CLANG_MFPU "") endif() elseif(CPU STREQUAL "Cortex-M35P") set(CLANG_ARCH "armv8m.main") @@ -162,38 +170,62 @@ elseif(CPU STREQUAL "Cortex-M35P") else() set(CLANG_MCPU "cortex-m35p+nodsp") endif() - set(CLANG_MFPU "fpv5-sp-d16") + set(CLANG_MFPU "") set(CLANG_MFLOATABI "hard") else() set(CLANG_ARCH_SUFFIX "_soft_nofp") if(DSP STREQUAL "DSP") - set(CLANG_MCPU "cortex-m35p") + set(CLANG_MCPU "cortex-m35p+nofp") else() - set(CLANG_MCPU "cortex-m35p+nodsp") + set(CLANG_MCPU "cortex-m35p+nodsp+nofp") endif() + set(CLANG_MFPU "") endif() elseif(CPU STREQUAL "Cortex-M52") set(CLANG_ARCH "armv8.1m.main") if(FPU STREQUAL "NO_FPU") if(MVE STREQUAL "NO_MVE") set(CLANG_ARCH_SUFFIX "_soft_nofp_nomve") - set(CLANG_MCPU "cortex-m52+nofp+nomve") - else() + set(CLANG_MCPU "cortex-m52+nomve+nofp") + set(CLANG_MFPU "") + elseif(MVE STREQUAL "MVE") set(CLANG_ARCH_SUFFIX "_hard_nofp_mve") - set(CLANG_MCPU "cortex-m52+nofp") + set(CLANG_MCPU "cortex-m52+nomve.fp+nofp") + set(CLANG_MFPU "") set(CLANG_MFLOATABI "hard") + elseif(MVE STREQUAL "FP_MVE" OR MVE STREQUAL "FP_FVE") + message(FATAL_ERROR "Error: cortex-m52 MVE FP requires an FPU!") + else() + message(FATAL_ERROR "Error: cortex-m52 MVE option '${MVE}' is not supported!") + endif() + elseif(FPU STREQUAL "SP_FPU") + set(CLANG_MFLOATABI "hard") + set(CLANG_MFPU "") + if(MVE STREQUAL "NO_MVE") + set(CLANG_ARCH_SUFFIX "_hard_fp_nomve") + set(CLANG_MCPU "cortex-m52+nomve+nofp.dp") + elseif(MVE STREQUAL "MVE") + set(CLANG_ARCH_SUFFIX "_hard_fp_nomve") + set(CLANG_MCPU "cortex-m52+nomve.fp+nofp.dp") + elseif(MVE STREQUAL "FP_MVE" OR MVE STREQUAL "FP_FVE") + message(FATAL_ERROR "Error: cortex-m52 MVE FP requires DP_FPU!") + else() + message(FATAL_ERROR "Error: cortex-m52 MVE option '${MVE}' is not supported!") endif() else() - set(CLANG_ARCH_SUFFIX "_hard_fp") + set(CLANG_MFLOATABI "hard") + set(CLANG_MFPU "") if(MVE STREQUAL "NO_MVE") + set(CLANG_ARCH_SUFFIX "_hard_fpdp_nomve") set(CLANG_MCPU "cortex-m52+nomve") elseif(MVE STREQUAL "MVE") - set(CLANG_MCPU "cortex-m52+nomve.fp") - else() + message(FATAL_ERROR "Error: cortex-m52 DP_FPU with integer-only MVE is not supported!") + elseif(MVE STREQUAL "FP_MVE" OR MVE STREQUAL "FP_FVE") + set(CLANG_ARCH_SUFFIX "_hard_fpdp") set(CLANG_MCPU "cortex-m52") + else() + message(FATAL_ERROR "Error: cortex-m52 MVE option '${MVE}' is not supported!") endif() - set(CLANG_MFPU "fpv5-sp-d16") - set(CLANG_MFLOATABI "hard") endif() elseif(CPU STREQUAL "Star-MC3") set(CLANG_ARCH "armv8.1m.main") @@ -214,7 +246,7 @@ elseif(CPU STREQUAL "Star-MC3") elseif(FPU STREQUAL "DP_FPU") message(FATAL_ERROR "Error: star-mc3+nomve.fp is not supported!") endif() - elseif(MVE STREQUAL "FP_MVE") + elseif(MVE STREQUAL "FP_MVE" OR MVE STREQUAL "FP_FVE") if(FPU STREQUAL "NO_FPU") message(FATAL_ERROR "Error: star-mc3+nofp is not supported!") elseif(FPU STREQUAL "SP_FPU") @@ -235,73 +267,95 @@ elseif(CPU STREQUAL "Cortex-M55") if(FPU STREQUAL "NO_FPU") if(MVE STREQUAL "NO_MVE") set(CLANG_ARCH_SUFFIX "_soft_nofp_nomve") - set(CLANG_MCPU "cortex-m55+nofp+nomve") - else() + set(CLANG_MCPU "cortex-m55+nomve+nofp") + set(CLANG_MFPU "") + elseif(MVE STREQUAL "MVE") set(CLANG_ARCH_SUFFIX "_hard_nofp_mve") - set(CLANG_MCPU "cortex-m55+nofp") + set(CLANG_MCPU "cortex-m55+nomve.fp+nofp") + set(CLANG_MFPU "") set(CLANG_MFLOATABI "hard") + elseif(MVE STREQUAL "FP_MVE" OR MVE STREQUAL "FP_FVE") + message(FATAL_ERROR "Error: cortex-m55 MVE FP requires an FPU!") + else() + message(FATAL_ERROR "Error: cortex-m55 MVE option '${MVE}' is not supported!") endif() else() - set(CLANG_ARCH_SUFFIX "_hard_fp") + set(CLANG_MFPU "") + set(CLANG_MFLOATABI "hard") if(MVE STREQUAL "NO_MVE") + set(CLANG_ARCH_SUFFIX "_hard_fpdp_nomve") set(CLANG_MCPU "cortex-m55+nomve") elseif(MVE STREQUAL "MVE") + set(CLANG_ARCH_SUFFIX "_hard_fpdp_nomve") set(CLANG_MCPU "cortex-m55+nomve.fp") - else() + elseif(MVE STREQUAL "FP_MVE" OR MVE STREQUAL "FP_FVE") + set(CLANG_ARCH_SUFFIX "_hard_fpdp") set(CLANG_MCPU "cortex-m55") + else() + message(FATAL_ERROR "Error: cortex-m55 MVE option '${MVE}' is not supported!") endif() - set(CLANG_MFPU "fpv5-sp-d16") - set(CLANG_MFLOATABI "hard") endif() elseif(CPU STREQUAL "Cortex-M85") set(CLANG_ARCH "armv8.1m.main") if(FPU STREQUAL "NO_FPU") if(MVE STREQUAL "NO_MVE") set(CLANG_ARCH_SUFFIX "_soft_nofp_nomve") - set(CLANG_MCPU "cortex-m85+nofp+nomve") - else() + set(CLANG_MCPU "cortex-m85+nomve+nofp") + set(CLANG_MFPU "") + elseif(MVE STREQUAL "MVE") set(CLANG_ARCH_SUFFIX "_hard_nofp_mve") - set(CLANG_MCPU "cortex-m85+nofp") + set(CLANG_MCPU "cortex-m85+nomve.fp+nofp") + set(CLANG_MFPU "") set(CLANG_MFLOATABI "hard") + elseif(MVE STREQUAL "FP_MVE" OR MVE STREQUAL "FP_FVE") + message(FATAL_ERROR "Error: cortex-m85 MVE FP requires an FPU!") + else() + message(FATAL_ERROR "Error: cortex-m85 MVE option '${MVE}' is not supported!") endif() else() - set(CLANG_ARCH_SUFFIX "_hard_fp") + set(CLANG_MFPU "") + set(CLANG_MFLOATABI "hard") if(MVE STREQUAL "NO_MVE") + set(CLANG_ARCH_SUFFIX "_hard_fpdp_nomve") set(CLANG_MCPU "cortex-m85+nomve") elseif(MVE STREQUAL "MVE") - set(CLANG_MCPU "cortex-m85+nomve.fp") - else() + message(FATAL_ERROR "Error: cortex-m85 with integer-only MVE and FPU is not supported!") + elseif(MVE STREQUAL "FP_MVE" OR MVE STREQUAL "FP_FVE") + set(CLANG_ARCH_SUFFIX "_hard_fpdp") set(CLANG_MCPU "cortex-m85") + else() + message(FATAL_ERROR "Error: cortex-m85 MVE option '${MVE}' is not supported!") endif() - set(CLANG_MFPU "fpv5-sp-d16") - set(CLANG_MFLOATABI "hard") endif() elseif(CPU STREQUAL "Cortex-A5") set(CLANG_ARCH "armv7") if(FPU STREQUAL "DP_FPU") - set(CLANG_MCPU "cortex-a5+nosimd") - set(CLANG_MFPU "vfpv4-d16") + set(CLANG_MCPU "cortex-a5") + set(CLANG_MFPU "") set(CLANG_MFLOATABI "hard") else() - set(CLANG_MCPU "cortex-a5+nosimd+nofp") + set(CLANG_MCPU "cortex-a5+nofp") + set(CLANG_MFPU "") endif() elseif(CPU STREQUAL "Cortex-A7") set(CLANG_ARCH "armv7") if(FPU STREQUAL "DP_FPU") - set(CLANG_MCPU "cortex-a7+nosimd") - set(CLANG_MFPU "vfpv4-d16") + set(CLANG_MCPU "cortex-a7") + set(CLANG_MFPU "") set(CLANG_MFLOATABI "hard") else() - set(CLANG_MCPU "cortex-a7+nosimd+nofp") + set(CLANG_MCPU "cortex-a7+nofp") + set(CLANG_MFPU "") endif() elseif(CPU STREQUAL "Cortex-A9") set(CLANG_ARCH "armv7") if(FPU STREQUAL "DP_FPU") - set(CLANG_MCPU "cortex-a9+nosimd") - set(CLANG_MFPU "vfpv3-d16") + set(CLANG_MCPU "cortex-a9") + set(CLANG_MFPU "") set(CLANG_MFLOATABI "hard") else() - set(CLANG_MCPU "cortex-a9+nosimd+nofp") + set(CLANG_MCPU "cortex-a9+nofp") + set(CLANG_MFPU "") endif() elseif(CPU STREQUAL "Cortex-A35") set(CLANG_ARCH "armv8") @@ -309,6 +363,7 @@ elseif(CPU STREQUAL "Cortex-A35") set(CLANG_MCPU "cortex-a35") else() set(CLANG_MCPU "cortex-a35+nofp") + set(CLANG_MABI "aapcs-soft") endif() elseif(CPU STREQUAL "Cortex-A53") set(CLANG_ARCH "armv8") @@ -316,6 +371,7 @@ elseif(CPU STREQUAL "Cortex-A53") set(CLANG_MCPU "cortex-a53") else() set(CLANG_MCPU "cortex-a53+nofp") + set(CLANG_MABI "aapcs-soft") endif() elseif(CPU STREQUAL "Cortex-A55") set(CLANG_ARCH "armv8") @@ -323,6 +379,7 @@ elseif(CPU STREQUAL "Cortex-A55") set(CLANG_MCPU "cortex-a55") else() set(CLANG_MCPU "cortex-a55+nofp") + set(CLANG_MABI "aapcs-soft") endif() elseif(CPU STREQUAL "Cortex-A57") set(CLANG_ARCH "armv8") @@ -330,42 +387,47 @@ elseif(CPU STREQUAL "Cortex-A57") set(CLANG_MCPU "cortex-a57") else() set(CLANG_MCPU "cortex-a57+nofp") + set(CLANG_MABI "aapcs-soft") endif() elseif(CPU STREQUAL "Cortex-R4") set(CLANG_ARCH "armv7") if(FPU STREQUAL "DP_FPU") set(CLANG_MCPU "cortex-r4f") - set(CLANG_MFPU "vfpv3-d16") + set(CLANG_MFPU "") set(CLANG_MFLOATABI "hard") else() - set(CLANG_MCPU "cortex-r4+nofp") + set(CLANG_MCPU "cortex-r4") + set(CLANG_MFPU "") endif() elseif(CPU STREQUAL "Cortex-R5") set(CLANG_ARCH "armv7") if(FPU STREQUAL "DP_FPU") set(CLANG_MCPU "cortex-r5") - set(CLANG_MFPU "vfpv3-d16") + set(CLANG_MFPU "") set(CLANG_MFLOATABI "hard") else() set(CLANG_MCPU "cortex-r5+nofp") + set(CLANG_MFPU "") endif() elseif(CPU STREQUAL "Cortex-R7") set(CLANG_ARCH "armv7") if(FPU STREQUAL "DP_FPU") set(CLANG_MCPU "cortex-r7") - set(CLANG_MFPU "vfpv3-d16") + set(CLANG_MFPU "") set(CLANG_MFLOATABI "hard") else() - set(CLANG_MCPU "-mcpu=cortex-r7+nofp") + set(CLANG_MCPU "cortex-r7+nofp") + set(CLANG_MFPU "") endif() elseif(CPU STREQUAL "Cortex-R8") set(CLANG_ARCH "armv7") if(FPU STREQUAL "DP_FPU") set(CLANG_MCPU "cortex-r8") - set(CLANG_MFPU "vfpv3-d16") + set(CLANG_MFPU "") set(CLANG_MFLOATABI "hard") else() - set(CLANG_MCPU "-mcpu=cortex-r8+nofp") + set(CLANG_MCPU "cortex-r8+nofp") + set(CLANG_MFPU "") endif() endif() if(NOT DEFINED CLANG_MCPU) @@ -374,14 +436,24 @@ endif() if(CLANG_ARCH STREQUAL "armv8") set(CLANG_TARGET "aarch64-none-elf") - set(CLANG_CPU "-mcpu=${CLANG_MCPU}") + if(DEFINED CLANG_MABI) + set(CLANG_CPU "-mcpu=${CLANG_MCPU} -mabi=${CLANG_MABI}") + else() + set(CLANG_CPU "-mcpu=${CLANG_MCPU}") + endif() else() - if(CLANG_MFLOATABI STREQUAL "hard") + if(CPU MATCHES "^Cortex-[AMR]") + set(CLANG_TARGET "arm-none-eabi") + elseif(CLANG_MFLOATABI STREQUAL "hard") set(CLANG_TARGET "${CLANG_ARCH}-none-eabihf") else() set(CLANG_TARGET "${CLANG_ARCH}-none-eabi") endif() - set(CLANG_CPU "--target=${CLANG_TARGET} -mcpu=${CLANG_MCPU} -mfpu=${CLANG_MFPU} -mfloat-abi=${CLANG_MFLOATABI}") + if("${CLANG_MFPU}" STREQUAL "") + set(CLANG_CPU "--target=${CLANG_TARGET} -mcpu=${CLANG_MCPU} -mfloat-abi=${CLANG_MFLOATABI}") + else() + set(CLANG_CPU "--target=${CLANG_TARGET} -mcpu=${CLANG_MCPU} -mfpu=${CLANG_MFPU} -mfloat-abi=${CLANG_MFLOATABI}") + endif() endif() set(CMAKE_CXX_COMPILER_TARGET "${CLANG_TARGET}") From 938825f7a3148fa58b8e7bffc310bc9b5e129ec1 Mon Sep 17 00:00:00 2001 From: Chen Tang Date: Fri, 19 Jun 2026 09:33:05 +0200 Subject: [PATCH 2/5] Potential fix for pull request finding Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com> --- tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake b/tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake index 042ef3c8c..45273c1bc 100644 --- a/tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake +++ b/tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake @@ -193,7 +193,7 @@ elseif(CPU STREQUAL "Cortex-M52") set(CLANG_MCPU "cortex-m52+nomve.fp+nofp") set(CLANG_MFPU "") set(CLANG_MFLOATABI "hard") - elseif(MVE STREQUAL "FP_MVE" OR MVE STREQUAL "FP_FVE") + elseif(MVE STREQUAL "FP_MVE") message(FATAL_ERROR "Error: cortex-m52 MVE FP requires an FPU!") else() message(FATAL_ERROR "Error: cortex-m52 MVE option '${MVE}' is not supported!") From 3a9329403ea6d1abe66daa9987ee130e654cfa45 Mon Sep 17 00:00:00 2001 From: Chen Tang Date: Fri, 19 Jun 2026 16:22:41 +0200 Subject: [PATCH 3/5] fixed FVE typos Removed redundant checks for FP_FVE in MVE conditions to simplify error handling for cortex-m CPUs. --- .../cbuildgen/config/CLANG.17.0.1.cmake | 20 ++++++++----------- 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake b/tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake index 45273c1bc..37daed1c1 100644 --- a/tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake +++ b/tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake @@ -207,7 +207,7 @@ elseif(CPU STREQUAL "Cortex-M52") elseif(MVE STREQUAL "MVE") set(CLANG_ARCH_SUFFIX "_hard_fp_nomve") set(CLANG_MCPU "cortex-m52+nomve.fp+nofp.dp") - elseif(MVE STREQUAL "FP_MVE" OR MVE STREQUAL "FP_FVE") + elseif(MVE STREQUAL "FP_MVE") message(FATAL_ERROR "Error: cortex-m52 MVE FP requires DP_FPU!") else() message(FATAL_ERROR "Error: cortex-m52 MVE option '${MVE}' is not supported!") @@ -220,7 +220,7 @@ elseif(CPU STREQUAL "Cortex-M52") set(CLANG_MCPU "cortex-m52+nomve") elseif(MVE STREQUAL "MVE") message(FATAL_ERROR "Error: cortex-m52 DP_FPU with integer-only MVE is not supported!") - elseif(MVE STREQUAL "FP_MVE" OR MVE STREQUAL "FP_FVE") + elseif(MVE STREQUAL "FP_MVE") set(CLANG_ARCH_SUFFIX "_hard_fpdp") set(CLANG_MCPU "cortex-m52") else() @@ -246,7 +246,7 @@ elseif(CPU STREQUAL "Star-MC3") elseif(FPU STREQUAL "DP_FPU") message(FATAL_ERROR "Error: star-mc3+nomve.fp is not supported!") endif() - elseif(MVE STREQUAL "FP_MVE" OR MVE STREQUAL "FP_FVE") + elseif(MVE STREQUAL "FP_MVE") if(FPU STREQUAL "NO_FPU") message(FATAL_ERROR "Error: star-mc3+nofp is not supported!") elseif(FPU STREQUAL "SP_FPU") @@ -274,7 +274,7 @@ elseif(CPU STREQUAL "Cortex-M55") set(CLANG_MCPU "cortex-m55+nomve.fp+nofp") set(CLANG_MFPU "") set(CLANG_MFLOATABI "hard") - elseif(MVE STREQUAL "FP_MVE" OR MVE STREQUAL "FP_FVE") + elseif(MVE STREQUAL "FP_MVE") message(FATAL_ERROR "Error: cortex-m55 MVE FP requires an FPU!") else() message(FATAL_ERROR "Error: cortex-m55 MVE option '${MVE}' is not supported!") @@ -288,7 +288,7 @@ elseif(CPU STREQUAL "Cortex-M55") elseif(MVE STREQUAL "MVE") set(CLANG_ARCH_SUFFIX "_hard_fpdp_nomve") set(CLANG_MCPU "cortex-m55+nomve.fp") - elseif(MVE STREQUAL "FP_MVE" OR MVE STREQUAL "FP_FVE") + elseif(MVE STREQUAL "FP_MVE") set(CLANG_ARCH_SUFFIX "_hard_fpdp") set(CLANG_MCPU "cortex-m55") else() @@ -307,7 +307,7 @@ elseif(CPU STREQUAL "Cortex-M85") set(CLANG_MCPU "cortex-m85+nomve.fp+nofp") set(CLANG_MFPU "") set(CLANG_MFLOATABI "hard") - elseif(MVE STREQUAL "FP_MVE" OR MVE STREQUAL "FP_FVE") + elseif(MVE STREQUAL "FP_MVE") message(FATAL_ERROR "Error: cortex-m85 MVE FP requires an FPU!") else() message(FATAL_ERROR "Error: cortex-m85 MVE option '${MVE}' is not supported!") @@ -320,7 +320,7 @@ elseif(CPU STREQUAL "Cortex-M85") set(CLANG_MCPU "cortex-m85+nomve") elseif(MVE STREQUAL "MVE") message(FATAL_ERROR "Error: cortex-m85 with integer-only MVE and FPU is not supported!") - elseif(MVE STREQUAL "FP_MVE" OR MVE STREQUAL "FP_FVE") + elseif(MVE STREQUAL "FP_MVE") set(CLANG_ARCH_SUFFIX "_hard_fpdp") set(CLANG_MCPU "cortex-m85") else() @@ -436,11 +436,7 @@ endif() if(CLANG_ARCH STREQUAL "armv8") set(CLANG_TARGET "aarch64-none-elf") - if(DEFINED CLANG_MABI) - set(CLANG_CPU "-mcpu=${CLANG_MCPU} -mabi=${CLANG_MABI}") - else() - set(CLANG_CPU "-mcpu=${CLANG_MCPU}") - endif() + set(CLANG_CPU "-mcpu=${CLANG_MCPU}") else() if(CPU MATCHES "^Cortex-[AMR]") set(CLANG_TARGET "arm-none-eabi") From 12df7b1d393bb8d74abed7e0d1edf5c3648fe631 Mon Sep 17 00:00:00 2001 From: Chen Tang Date: Mon, 22 Jun 2026 10:42:18 +0200 Subject: [PATCH 4/5] reviewed -mabi options for aarch64 Cortex-A CPUs actually the option -mabi is very much irrelevant to this cmake file, because: 1) -mabi option is only meant for aarch64 state 2) -mabi=aapcs is default and aarch64 cortex-a actually doesn't really support the option without FPU: "Targeting A-profile processors in AArch64 state without an FPU is considered an [LLVM project] feature" https://developer.arm.com/documentation/107976/22-1-0/Compile-for-a-specific-Arm-architecture-or-Arm-processor/-mcpu-command-line-options-for-A-profile-processors?lang=en But make the changes regarding -mabi option in this commit to be better compliant to the manual page above --- tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake b/tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake index 37daed1c1..eb1b545b5 100644 --- a/tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake +++ b/tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake @@ -86,6 +86,7 @@ endfunction() set(CLANG_MFPU "none") set(CLANG_MFLOATABI "soft") +set(CLANG_MABI "") if(CPU STREQUAL "Cortex-M0") set(CLANG_ARCH "armv6m") @@ -361,6 +362,7 @@ elseif(CPU STREQUAL "Cortex-A35") set(CLANG_ARCH "armv8") if(FPU STREQUAL "DP_FPU") set(CLANG_MCPU "cortex-a35") + set(CLANG_MABI "aapcs") else() set(CLANG_MCPU "cortex-a35+nofp") set(CLANG_MABI "aapcs-soft") @@ -369,6 +371,7 @@ elseif(CPU STREQUAL "Cortex-A53") set(CLANG_ARCH "armv8") if(FPU STREQUAL "DP_FPU") set(CLANG_MCPU "cortex-a53") + set(CLANG_MABI "aapcs") else() set(CLANG_MCPU "cortex-a53+nofp") set(CLANG_MABI "aapcs-soft") @@ -377,6 +380,7 @@ elseif(CPU STREQUAL "Cortex-A55") set(CLANG_ARCH "armv8") if(FPU STREQUAL "DP_FPU") set(CLANG_MCPU "cortex-a55") + set(CLANG_MABI "aapcs") else() set(CLANG_MCPU "cortex-a55+nofp") set(CLANG_MABI "aapcs-soft") @@ -385,6 +389,7 @@ elseif(CPU STREQUAL "Cortex-A57") set(CLANG_ARCH "armv8") if(FPU STREQUAL "DP_FPU") set(CLANG_MCPU "cortex-a57") + set(CLANG_MABI "aapcs") else() set(CLANG_MCPU "cortex-a57+nofp") set(CLANG_MABI "aapcs-soft") @@ -434,9 +439,14 @@ if(NOT DEFINED CLANG_MCPU) message(FATAL_ERROR "Error: CPU is not supported!") endif() +set(CLANG_ABI "") +if(NOT "${CLANG_MABI}" STREQUAL "") + set(CLANG_ABI "-mabi=${CLANG_MABI}") +endif() + if(CLANG_ARCH STREQUAL "armv8") set(CLANG_TARGET "aarch64-none-elf") - set(CLANG_CPU "-mcpu=${CLANG_MCPU}") + set(CLANG_CPU "-mcpu=${CLANG_MCPU} ${CLANG_ABI}") else() if(CPU MATCHES "^Cortex-[AMR]") set(CLANG_TARGET "arm-none-eabi") From 84d3dceeaeb10cabc6e537aa5d9be403dda2c5f5 Mon Sep 17 00:00:00 2001 From: Chen Tang Date: Mon, 22 Jun 2026 11:59:47 +0200 Subject: [PATCH 5/5] Update tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake yes, you are right Co-authored-by: Daniel Brondani --- tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake b/tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake index eb1b545b5..bd1fa9b25 100644 --- a/tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake +++ b/tools/buildmgr/cbuildgen/config/CLANG.17.0.1.cmake @@ -446,7 +446,7 @@ endif() if(CLANG_ARCH STREQUAL "armv8") set(CLANG_TARGET "aarch64-none-elf") - set(CLANG_CPU "-mcpu=${CLANG_MCPU} ${CLANG_ABI}") + set(CLANG_CPU "--target=${CLANG_TARGET} -mcpu=${CLANG_MCPU} ${CLANG_ABI}") else() if(CPU MATCHES "^Cortex-[AMR]") set(CLANG_TARGET "arm-none-eabi")