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fix: write both bitplanes for BWR/BWY direct display#82

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balloob:fix/bwr-bwy-direct-write-plane2
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fix: write both bitplanes for BWR/BWY direct display#82
balloob wants to merge 1 commit into
OpenDisplay:mainfrom
balloob:fix/bwr-bwy-direct-write-plane2

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@balloob

@balloob balloob commented Jul 5, 2026

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Problem

On 3-colour panels (BWR / BWY colour schemes), the BLE direct-write path only ever wrote the black/white plane. The red/yellow accent plane was never sent to the controller, so every 3-colour refresh committed a new image on the BW layer while showing whatever stale content was left in the accent RAM.

Root cause

handleDirectWriteStart sized a BWR/BWY upload at a single flat plane ((pixels + 7) / 8) and the streamer never issued bbepStartWrite(&bbep, PLANE_1), so the second (accent) plane was dropped. The auto-END fired as soon as one plane's worth of bytes had arrived. This is a regression from the "Big Refactor" (fd0d73a), which dropped the plane-switch logic that existed in 5dcb60b.

All senders (py-opendisplay, website JS) already transmit two concatenated, row-padded 1-bit planes: plane0 = black/white (palette index 1) then plane1 = accent (index 2). That is byte-for-byte the same layout the GRAY4 path already streams.

Fix

Route BWR/BWY through the existing two-plane streamer (streamGray4Bytes), which drives the PLANE_0 → PLANE_1 switch off the running directWriteBytesWritten:

  • Start size: size the upload at two row-padded planes (2 * ((width+7)/8) * height), matching the gray4 formula. This also makes the compressed decompressed-size check equal the client's 2-plane uncompressed_size, fixing the compressed-BWR START NACK for free.
  • Dispatch: stream bitplanes through the plane-splitter on both the uncompressed and compressed decompress paths.
  • END guard: extend the "both planes must be present before refresh" check to bitplanes, so a short/one-plane payload errors ({0xFF, 0x72}) instead of refreshing stale RAM.
  • Updated the streamGray4Bytes doc comment to reflect that it now also serves BWR/BWY (identical byte layout).

The change is surgical (13 insertions, 11 deletions in one file); no other colour scheme or the partial-update path is touched. The initial bbepStartWrite(PLANE_0) for bitplanes is harmless — streamGray4Bytes re-issues bbepStartWrite(PLANE_0) at offset 0, exactly as the tolerated gray4 double-start already does.

Testing

Compiled clean with PlatformIO (no source changes needed beyond this file):

  • pio run -e nrf52840custom → SUCCESS
  • pio run -e esp32-s3-N16R8 → SUCCESS

Not yet smoke-tested on hardware. This still needs a hardware smoke test on a real BWR/BWY panel (uncompressed and compressed direct-write) to confirm the accent plane now renders — I can't run that here.

Related

Web-tool counterpart: OpenDisplay/opendisplay.org#26

🤖 Generated with Claude Code

https://claude.ai/code/session_012g2e8mr132vcizx92WsgiR

The BLE direct-write path sized 3-colour (BWR/BWY) uploads at a single
flat plane and never switched the controller to PLANE_1, so the accent
(red/yellow) plane was never written and every 3-colour refresh showed
stale accent RAM. The "Big Refactor" (fd0d73a) dropped the plane-switch
logic that existed in 5dcb60b.

Senders (py-opendisplay, website JS) transmit two concatenated,
row-padded 1-bit planes: plane0 = black/white (palette index 1),
plane1 = accent (index 2) - byte-for-byte the same layout the GRAY4 path
already streams. Route BWR/BWY through the existing two-plane streamer
(streamGray4Bytes):

- Size the upload at two row-padded planes in handleDirectWriteStart
  (also makes the compressed decompressed-size check equal the client's
  2-plane uncompressed_size, fixing the compressed-BWR START NACK).
- Stream bitplanes through the plane-splitter on both the uncompressed
  and compressed dispatch paths.
- Extend the "both planes present before refresh" END guard to bitplanes
  so a short payload errors instead of refreshing stale RAM.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_012g2e8mr132vcizx92WsgiR
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