[Feat] Added JAX-Triton bridge for ROCm#649
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| signature=signature_with_constexpr, | ||
| ) | ||
| if is_hip: | ||
| # ROCm: active GPU target (gfx arch + 64-lane warp); binary is HSACO. |
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ROCm arch does not necessary have 64-lane wavefront
| compiled.asm["ptx"], # arg4: ptx (str) | ||
| "", # arg5: ttir (str) - empty | ||
| compute_capability, # arg6: compute_capability (int) | ||
| compiled.name, |
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Keep upstream comments as-is
| ) | ||
| if num_warps is None: | ||
| # 32 warps would exceed the 1024-thread block limit on AMD's 64-lane warp. | ||
| num_warps = 4 if is_hip_extension() else 32 |
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I picked 4 because that's Triton's own default num_warps, it is what triton.Config() and unspecified @triton.jit launch use.
Claude WalkthroughIntent. Extend TE's JAX/Triton custom-call bridge in Key changes.
Walkthrough.
Testing. New Notes for reviewers.
Generated by Claude. To request a code review, comment |
Claude reviewReviewed the PR-specific diff (
Verdict: looks clean. The ROCm/HSACO path, Gluon Copyright headers: OK — both modified files carry an AMD 2026 line above the preserved NVIDIA No new inline findings. |
Description
Extend TE's JAX Triton custom-call bridge to compile and dispatch AMD ROCm (HSACO) and Gluon kernels. This PR enables AMD's layout-explicit Gluon kernels to be called from JAX, mirroring NVIDIA's existing support.
Fixes https://github.com/ROCm/frameworks-internal/issues/16044
Type of change
Changes
Please list the changes introduced in this PR:
GluonASTSourcewith a full constexpr-marked signature.nanobind std::string), not raw bytes.num_warps/num_stagesfor non-autotuned Gluon layout matching.Checklist: